This course explains how to go about designing complex, high-speed digital systems. The use of modern EDA tools in the design, simulation and implementation is explored. A hardware description language such as Verilog or VHDL will be taught to model digital systems at Behavior and RTL level. The field programmable gate arrays (FPGA) will be used in the laboratory exercises as a vehicle to understand complete design-flow. Advanced methods of logic minimization and state-machine design will be studied. The working of complex logic and memory building blocks such as memory chips, arithmetic circuits, digital processors, UARTs etc. is included. The BIST and Scan techniques for testing of digital systems are also covered.